Section 57 Semiconductor Integrated Circuits Layout-Design Act, 2000
Section 57 Semiconductor Integrated Circuits Layout-Design Act, 2000:
Penalty for falsely representing a layout-design as registered.—
(1) No person shall make any representation with respect to a layout-design not being a registered layout-design, to the effect that it is a registered layout-design.
(2) If any person contravenes any of the provisions of sub-section (1), he shall be punishable with imprisonment for a term which may extend to six months, or with fine which may extend to fifty thousand rupees, or with both.
(3) For the purposes of this section, the use in India in relation to a layout-design of the word “registered”, or of any other expression referring whether expressly or impliedly to registration, shall be deemed to import a reference to registration in the register, except—
(a) where that word or other expression, is used in direct association with other words delineated in characters at least as large as those in which that word or other expression is delineated and indicating that the reference is to registration as a layout-design under the law of a country outside India being a country under the law of which the registration referred to is in fact in force; or
(b) where that other expression is of itself such as to indicate that the reference is to such registration as is mentioned in clause (a); or
(c) where that word is used in relation to a layout-design registered as a layout design under the law of a country outside India and in relation solely to such layout-design.
Supreme Court of India Important Judgments And Leading Case Law Related to Section 57 Semiconductor Integrated Circuits Layout-Design Act, 2000: Not Yet Available
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